Introduction | Schematic | PCB Design | Prototype | Spartan 3A

The prototype

The prototype PCB was photo-etched in two stages on Wednesday 20th January 2010, and populated/tested the day after.

Since I don't have plated-through hole capability, I've soldered wire between the two layers.

This prototype worked first time (which surprised me a bit, since it's the first time I've used a Xilinx in my own hardware before, and it's only the second 2-layer board I've made at home).

After making it, there are some changes I want to make to the board:

1. The reset generator is pretty much redundant - the reset pulse only comes on when the board powers up, and lasts 350ms. The amount of time it takes for the FPGA to power up is longer than that.
2. The FLASH ROM configuration device was bigger than I'd anticipated (that'll teach me not to order the wrong part!), and it's a wide SO-8, rather than the narrow version. Luckily, if I'm removing the reset generator, there'll be space for it. For the prototype, I just bent the pins under itself. Unfortunately, I did order 25 of these chips, so I'll stick with them for a bit (I should've ordered the AT45DB021D-SSH-B instead of AT45DB021D-SH-B).
3. I didn't realise I hadn't ordered a 50MHz oscillator until midway through construction, so I used a 20MHz one instead. Since the FPGA has clock multipliers/dividers (DCMs), it can cope (unless it's an odd multiplier/divider value).
4. The PROGB pin probably won't be required for everything, so I won't solder another one on there unless necessary.

Introduction | Schematic | PCB Design | Prototype | Spartan 3A