Design elements

Here are some of the design elements:

Ruler

The ruler along the top is the time in nanoseconds.

Markers

The three markers can be used for selecting different areas of the capture. When a marker is selected, the selected area is shown at the bottom left, with the start, end and delta times for the marker. Changing the marker changes this value.

Shown values

The last value that was presented as a mouse event (click or drag) is shown in the 2nd column of the main window.

Accuracy

The software uses 64-bit values for the times (in nanoseconds), and allows upto 64 bits of information to be kept. There isn't really a limit on the number of events.

The XilLogic hardware has these limitations:

• 2048 events
• 32-bit time (measured in 10s of nanoseconds, or around 42 seconds worth)
• 32-bit signal

Glitch highlighting

The software will highlight glitches (events that may be too small to see)

The blue and red lines are either side of the glitches (yellow background):

And when zoomed in, the glitch markers disappear:

Visible values

The positioning of the values for the current signal (if not a bit) is modelled on those done in the Xilinx simulator.

The left hand number has become truncated; the right hand number is shown in the centre of the available space:

Value types

The values can be displayed in a number of types:

• Bit
• Bit sequence (as Data[7:0])
• Decimal (signed/unsigned)
• Octal
• Hexadecimal
• ASCII (little/big-endian)
• Waveform (signed/unsigned)

For example, this is it showing hexadecimal values:

The waveform option is one that the Xilinx simulator doesn't have - it allows the value to be expressed as a waveform, so if you had an 8-bit A/D converter, then it could use those 8-bits to display a graph of the value, rather than showing you the values themselves.

Signal interpretation

Signals can be interpreted and displayed as pseudo-traces. For example, a set of signals could be interpreted as an SPI bus, and decoded accordingly. Or, an I2S bus could have the waveform displayed. *

* Features not currently available in current development version

Main page | Design | 2010-01-31 | 2010-02-01 | 2010-02-05 | 2010-02-06